https://wiki2.ztex.de/ Wed, 08 Apr 2026 01:49:34 +0000 FeedCreator 1.8 https://wiki2.ztex.de/lib/tpl/sidebar/images/favicon.ico https://wiki2.ztex.de/ https://wiki2.ztex.de/doku.php?id=en:ztex_boards:ztex_fpga_boards:bitstream_encryption&rev=1480030180&do=diff Bitstream Encryption Several ZTEX FPGA Boards support Bitstream encryption, e.g. USB-FPGA Modules 2.16, 2.13, 2.14 and 2.18. The key which is used to decrypt the bitstream is stored in special low power memory of the FPGA which is powered by a battery. This battery is an option and not installed by default. anonymous@undisclosed.example.com (Anonymous) en:ztex_boards:ztex_fpga_boards Thu, 24 Nov 2016 23:29:40 +0000 https://wiki2.ztex.de/doku.php?id=en:ztex_boards:ztex_fpga_boards:flash_acces_from_fpga&rev=1698697302&do=diff Flash access from FPGA Flash memory of ZTEX Series 2 FPGA boards can be accessed from the USB controller and from FPGA. Since release 20231030, the SDK contains a framework which avoids concurrent accesses to Flash. This page describes the different scenarios. anonymous@undisclosed.example.com (Anonymous) en:ztex_boards:ztex_fpga_boards Mon, 30 Oct 2023 20:21:42 +0000 https://wiki2.ztex.de/doku.php?id=en:ztex_boards:ztex_fpga_boards:high_speed_configuration&rev=1480030258&do=diff High speed FPGA configuration The following ZTEX FPGA Boards support different configuration speeds: FPGA Board Low speed (via EP0) High speed (via bulk Endpoint) USB-FPGA Modules 2.13 about 0.6 MByte/s up to 24 MByte/s USB-FPGA Modules 2.14 about 3 MByte/s up to 26 MByte/s anonymous@undisclosed.example.com (Anonymous) en:ztex_boards:ztex_fpga_boards Thu, 24 Nov 2016 23:30:58 +0000 https://wiki2.ztex.de/doku.php?id=en:ztex_boards:ztex_fpga_boards:indirect_flash_programming&rev=1698687359&do=diff Indirect Programming of SPI Flash via FPGA ZTEX Series 2 FPGA Board have SPI Flash memory that can be used to store the Bitstream. Most comfortable way to write data to Flash is to use the SDK (DeviceServer, FWLoader or the API). Nevertheless, on EZ-USB FX2 based FPGA Boards the SPI Flash can also be programmed indirectly through JTAG and FPGA using the Xilinx tools. anonymous@undisclosed.example.com (Anonymous) en:ztex_boards:ztex_fpga_boards Mon, 30 Oct 2023 17:35:59 +0000 https://wiki2.ztex.de/doku.php?id=en:ztex_boards:ztex_fpga_boards:jtag&rev=1385409626&do=diff JTAG The FPGA's on all ZTEX USB-FPGA Modules can be configured either via USB or via JTAG. Series 2 FPGA Boards JTAG signals on all Series 2 FPGA Boards are provided at pins A31 (TDI), B31 (TCK), C31 (TDO), D31 (TMS) and A32 (VIO) of the external I/O connector. JTAG headers are available on some FPGA boards as an option (if there is enough space) and on base boards, namely the Debug Board, the Cluster Board and the Series 1 Adapter. anonymous@undisclosed.example.com (Anonymous) en:ztex_boards:ztex_fpga_boards Mon, 25 Nov 2013 20:00:26 +0000 https://wiki2.ztex.de/doku.php?id=en:ztex_boards:ztex_fpga_boards:memory_tutorial_1_11&rev=1328808769&do=diff Memory tutorial for USB-FPGA-Modules 1.11 This tutorial explains how the memory controller IP Core is created on USB-FPGA-Modules 1.11. Creating the IP Core This section describes how the IP Core is created in an ISE project. The MIG version used for the screen shots below was MIG 3.5 (of ISE version 12.2). The settings for other versions should be very similar. anonymous@undisclosed.example.com (Anonymous) en:ztex_boards:ztex_fpga_boards Thu, 09 Feb 2012 17:32:49 +0000 https://wiki2.ztex.de/doku.php?id=en:ztex_boards:ztex_fpga_boards:memory_tutorial_1_15&rev=1486237335&do=diff Memory tutorial for USB-FPGA-Modules 1.15 This tutorial explains how the memory controller IP Core is created on USB-FPGA-Modules 1.15. Creating the IP Core This section describes how the IP Core is created in an ISE project. The MIG version used for the screen shots below was MIG 3.5 (of ISE version 12.2). The settings for other versions should be very similar. anonymous@undisclosed.example.com (Anonymous) en:ztex_boards:ztex_fpga_boards Sat, 04 Feb 2017 19:42:15 +0000 https://wiki2.ztex.de/doku.php?id=en:ztex_boards:ztex_fpga_boards:porting_to_1_15y&rev=1337335888&do=diff Porting to USB-FPGA Modules 1.15y In order to simplify the porting of applications from USB-FPGA Modules 1.15d and 1.15x to USB-FPGA Modules 1.15y the FPGA Boards are designed to be as compatible as possible. FPGA The I/O signals of the EZ-USB FX2 micro controller are shared by all FPGA's. These signals form a bus which is controlled by the FX2 USB controller using chip select (CS) signals. This is depicted in the USB-FPGA Module 1.15y block diagram: anonymous@undisclosed.example.com (Anonymous) en:ztex_boards:ztex_fpga_boards Fri, 18 May 2012 10:11:28 +0000 https://wiki2.ztex.de/doku.php?id=en:ztex_boards:ztex_fpga_boards:sd_cards_on_series_2_fpga_boards&rev=1473882354&do=diff SD card support on FX2 based Series 2 FPGA Boards ZTEX uses the FX3S on its FPGA Boards. These boards have native SD card support (including SDIO). On FX2 based based Series 2 FPGA Boards there is no SD socket. Users that miss it (e.g. because they previously used Series 1 Boards) can easily add a (micro)SD socket to their application circuit. anonymous@undisclosed.example.com (Anonymous) en:ztex_boards:ztex_fpga_boards Wed, 14 Sep 2016 19:45:54 +0000 https://wiki2.ztex.de/doku.php?id=en:ztex_boards:ztex_fpga_boards:standalone&rev=1687551948&do=diff Standalone applications In order to implement standalone applications the Firmware and the Bitstream have to be stored in non-volatile memory. At power-on the USB controller boots the Firmware from EEPROM or Flash and the Firmware configures the FPGA using a Bitstream stored in Flash. anonymous@undisclosed.example.com (Anonymous) en:ztex_boards:ztex_fpga_boards Fri, 23 Jun 2023 20:25:48 +0000 https://wiki2.ztex.de/doku.php?id=en:ztex_boards:ztex_fpga_boards:usb_powering&rev=1698682707&do=diff USB Powering Most Sereies 2 FPGA Boards can be powered via USB. Whether the bus deliver sufficient current depends form the application the memory usage (RAM and controller take about 1W) and the USB specification. Whether / how USB powering is supported is listed in the following table anonymous@undisclosed.example.com (Anonymous) en:ztex_boards:ztex_fpga_boards Mon, 30 Oct 2023 16:18:27 +0000 https://wiki2.ztex.de/doku.php?id=en:ztex_boards:ztex_fpga_boards:ztex_fpga_boards&rev=1698687472&do=diff ZTEX FPGA Boards Articles * memfifo example * Memory tutorial for USB-FPGA Module 2.04 * Memory tutorial for USB-FPGA Module 2.13 * JTAG * Standalone apllications * Memory tutorial for USB-FPGA Modules 1.11 * Memory tutorial for USB-FPGA Modules 1.15 * USB Powering * Flash access from FPGA * High speed configuration * Porting to USB-FPGA Modules 1.15y * Bitstream Encryption * Indirect Programming of SPI Flash * SD-card support on Series 2 FPGA Boards anonymous@undisclosed.example.com (Anonymous) en:ztex_boards:ztex_fpga_boards Mon, 30 Oct 2023 17:37:52 +0000