https://wiki2.ztex.de/ Wed, 08 Apr 2026 00:25:35 +0000 FeedCreator 1.8 https://wiki2.ztex.de/lib/tpl/sidebar/images/favicon.ico https://wiki2.ztex.de/ https://wiki2.ztex.de/doku.php?id=en:projects:cpu&rev=1507321659&do=diff Implementations of free CPU's on Spartan-6 Implemented only the CPU without ROM, RAM and IO CPU Option Max clock Pipeline Slice Registers Slice LUTs Occupied Slices LUT Flip Flop pairs Storm 87 Mhz 7 996 1,807 607 1,987 Ion 95 Mhz 3 430 anonymous@undisclosed.example.com (Anonymous) en:projects Fri, 06 Oct 2017 20:27:39 +0000 https://wiki2.ztex.de/doku.php?id=en:projects:giant&rev=1302875326&do=diff GIAnT GIAnT (Generic Implementation ANalysis Toolkit) is a platform for physical analysis of (embedded) devices. It is primarily designed for hardware security analysis using fault injection and side-channel analysis. The hardware for this project is built around a anonymous@undisclosed.example.com (Anonymous) en:projects Fri, 15 Apr 2011 13:48:46 +0000 https://wiki2.ztex.de/doku.php?id=en:projects:helloworld_fpga&rev=1486238956&do=diff FIXME This article has been submitted by a user. Unfortunately he is not able to verify that the example is running. Therefore it cannot be considered as working. Another Microblaze eample can be found at MicroBlaze MCS Demo FIXME "Hello World!" running on Microblaze anonymous@undisclosed.example.com (Anonymous) en:projects Sat, 04 Feb 2017 20:09:16 +0000 https://wiki2.ztex.de/doku.php?id=en:projects:jop&rev=1503386706&do=diff Running JOP (Java Optimized Processor) on a ZTEX FPGA Board JOP - Java Optimized Processor - is one way to use a configurable Java processor in small embedded real-time systems. It shall help to increase the acceptance of Java for these systems. This project explains how a JOP processor can be implemented on a anonymous@undisclosed.example.com (Anonymous) en:projects Tue, 22 Aug 2017 07:25:06 +0000 https://wiki2.ztex.de/doku.php?id=en:projects:la&rev=1505816963&do=diff Logic Analyzer The Logic Analyzer supports 32 channels with 6K sample memory. The included Java client application allows waveform exploration as well as SPI and I2C protocol analysis. This is a slightly modified version of Sump. Since there is no problem to investigate external signals, sync module was removed. This has increased the max clock speed and slightly reduced footprint. anonymous@undisclosed.example.com (Anonymous) en:projects Tue, 19 Sep 2017 10:29:23 +0000 https://wiki2.ztex.de/doku.php?id=en:projects:latticemico32&rev=1302870932&do=diff Porting the LatticeMico32 to a ZTEX FPGA Board In this project the LatticeMico32 is ported to a ZTEX USB-FPGA Module 1.11c. The LatticeMico32 is an open source soft core RISC processor provided by Lattice. The Lattice system generates a set of Verilog files which can be ported to the FPGA. anonymous@undisclosed.example.com (Anonymous) en:projects Fri, 15 Apr 2011 12:35:32 +0000 https://wiki2.ztex.de/doku.php?id=en:projects:leon3&rev=1328801707&do=diff LEON3 SPARC processor The LEON3 is a synthesisable VHDL model of a 32-bit processor compliant with the SPARC V8 architecture. The model is highly configurable, and particularly suitable for system-on-a-chip (SOC) designs. The full source code is available under the GNU anonymous@undisclosed.example.com (Anonymous) en:projects Thu, 09 Feb 2012 15:35:07 +0000 https://wiki2.ztex.de/doku.php?id=en:projects:openadc&rev=1372402924&do=diff OpenADC Introduction OpenADC is an open-source ADC module that fits many FPGAs, and you can use this code for basically any ADC or other streaming data interface. Here is the ZTEX USB 1.11 connected to the OpenADC module: This reference design includes a Python-based application on the computer which handles downloading & displaying data: anonymous@undisclosed.example.com (Anonymous) en:projects Fri, 28 Jun 2013 07:02:04 +0000 https://wiki2.ztex.de/doku.php?id=en:projects:smartlogic&rev=1310477482&do=diff SmartLogic The SmartLogic project turns a ZTEX USB-FPGA-Module 1.2 into a flexible smart card research tool that allows complete control over the smart card communication channel for eavesdropping, man-in-the-middle attacks, relaying and card emulation. References * SmartLogic source code (Google Code) Introduction anonymous@undisclosed.example.com (Anonymous) en:projects Tue, 12 Jul 2011 13:31:22 +0000 https://wiki2.ztex.de/doku.php?id=en:projects:start&rev=1698697506&do=diff Projects and examples This section is intended for the presentation of example projects. Examples from the SDK A lot of examples can be found in the ZTEX SDK package. Just one of it is presented here in order to give an impression about the Usage of the ZTEX SDK. anonymous@undisclosed.example.com (Anonymous) en:projects Mon, 30 Oct 2023 20:25:06 +0000 https://wiki2.ztex.de/doku.php?id=en:projects:ztexmicroblazemcsdemo&rev=1406795903&do=diff MicroBlaze MCS Demo A demo with MicroBlaze MCS writing string to USB and LCD (not required). For more info, please visit the projects homepage. anonymous@undisclosed.example.com (Anonymous) en:projects Thu, 31 Jul 2014 08:38:23 +0000